I'd like to ask a few questions about the DMA lab :

1. In the block diagram, the Address Register Logic, Control Register Logic have an input called Data. Is that the Data to be transferred by the DMA ? (i.e. the same as the input to the Data Register Logic). If yes, why do we need it for the Address Register Logic and the Control Register Logic ?

2. I'm not clear about the function of the Register Acces Control. In the hand-out, it is said that it handles reads and writes to the control registers from the CPU, but how ?

-- Mai Nguyen (nguyeno@ecf.toronto.edu), February 17, 1999

Answers

The CPU needs to be able to write values to all of the DMA Controller's registers. These values will come from the processor bus data signals.

The Register Access Control is logic to control writing to/reading from the three registers. The logic should be very similar to what was needed in previous labs.

-- Steven Caranci (caranci@eecg.toronto.edu), February 18, 1999.